As the manufacturing technologies of semiconductor devices, the following technologies are known.
For example, in the manufacturing process of a semiconductor device, after forming semiconductor circuits on a wafer, an assembly step is carried out, through which products such as packaged products, bare chips, and CSPs (Chip Size Packages) which are typical shipping forms of semiconductor devices are formed. Inspections performed in the manufacturing process of such semiconductor devices are roughly sorted into the following three inspections. First is wafer inspection for checking the conduction state and the electrical signal operating state of semiconductor elements, which is performed in a wafer state in which semiconductor circuits and electrodes are formed on a wafer. Second is burn-in test in which semiconductor elements are placed in a high-temperature state so as to eliminate unstable semiconductor elements. Third is sorting inspection for checking the product performance before shipping the semiconductor devices.
Numerous semiconductor devices (chips) are provided on the surface of such a wafer, and are individually separated and then used. Numerous electrodes are arranged on the surface of the individually separated semiconductor devices. In order to inspect the electrical properties of such semiconductor devices mass-produced industrially, a connecting device comprising probes formed of tungsten needles obliquely projecting from a probe card (hereinafter, referred to as Conventional Technology 1) has been employed. Inspections by use of the connecting device employ a method in which contact is achieved by scratching the electrodes with the contact pressure utilizing flexibility of the probes and then the electrical properties thereof are inspected.
Also, as another conventional technology, for example, the technology described in Japanese Patent Application Laid-Open Publication No. 7-283280 (Patent Document 1) is known. This document discloses an inspection system as follows. That is, contact terminals which are formed from the holes used as molds formed by anisotropic etching of silicon are formed on the wiring on a flexible insulating film, and a probe sheet fixing substrate in which a buffer layer is interposed and fixed on the rear surface side of the contact terminal forming surface of the insulating film is overlapped on a wafer support substrate in which the wafer on which the semiconductor devices to be inspected are formed is fixed in a wafer-shaped groove of the wafer support substrate. By doing so, the tip surfaces of the contact terminal group are brought into contact with the surfaces of the electrode group of the wafer to achieve the electrical connection and then inspect the semiconductor devices.
Furthermore, as another conventional technology, for example, the technology described in Japanese Patent Application Laid-Open Publication No. 11-135582 is known. This document discloses a burn-in wafer cassette as follows. That is, a probe sheet including bumps which penetrate polyimide resin and serve as contact terminals, wiring board in contact with the sheet via anisotropic conductive rubber on the rear surface thereof, and a wafer tray on which the wafer is placed are sealed with a circular sealing member provided outside the wafer mounting part, and the pressure of the space between the wiring board and the wafer tray sealed by the sealing member is reduced. By doing so, the tip surfaces of the contact terminal group of the probe sheet are brought into contact with the surfaces of the electrode group of the wafer to achieve the electrical connection and then the semiconductor devices are inspected.